In the manufacture of hybrid integrated circuits (ICs), mounted IC chips are electrically connected to each other through the use of a local interconnection metal that is deposited and patterned after the ICs have completed there front-end fabrication and tests. The original IC front-end processing provides chips that have a protective overcoat (PO), typically silicon dioxide (SiO.sub.2) or silicon nitride (Si.sub.3 N.sub.4), in which vias for local interconnection metal have already been provided. Typically this local interconnection metal is an aluminum alloy or titanium tungsten (TiW). These metals must be etched with wet acids because the normal gaseous etchants that are used in dry processing, such as reactive ion etching or plasma etching, attack the PO of the IC even faster than the etch attacks the local interconnection metal. As soon as the PO layer of the IC is penetrated, there is catastrophic, non-repairable damage to the IC.
As a typical example of such hybrid structures, FIG. 1 shows the mounting of an IR sensing array chip 82 to a companion IC signal processing chip 80 such as described in cross-referenced applications 08/223,087 and 08/223,088 and U.S. Pat. No. 5,466,332. FIG. 2 is an enlarged view of the contact via 78 area showing that the PO 84 is placed in jeopardy if etching by dry processing is performed.
For small, controlled conductor line widths, it is very desirable that the local interconnection metal be etched by means of dry processing.